Sigma Studio Version 4.7. Build 0, Rev 1828

Analog Devices Compiler for the 3rd generation SigmaDSP core.
Build date = 4/5/2022 at 11:20 AM

## Summary ##
(Note: Estimates are based on a 48 kHz sample rate)

Instructions used:
47	(out of a possible 512 )
Modulo Data RAM used (X Memory):
2	(out of a possible 2048 )
Non Modulo Data RAM used (X Memory):
0	(out of a possible 2048 )
Parameter RAM used (Y Memory):
9	(out of a possible 2048 )

Instance                      		Cycles	Inst	Data	Coeff	Other
                              			(max)
SafeLoadCode                  		20	20	1	8
Beginning                     		17	17	0	1
End                           		6	6	0	0
ADC IN1                       		2	2	1	0
SDSP OUT1                     		2	2	0	0

Subroutines called:
----------------------------------------------------------------------------------------------------------------------------------------------------------------------
Total                      			47	47	2	9
----------------------------------------------------------------------------------------------------------------------------------------------------------------------
(%)                          			9%	9%	0%	0%

Files written:  
program_data.dat - load file for downloading code using ADI loader
hex_program_data.dat - load file for downloading code using microcontroller 
ParamAddress.dat - Parameter RAM locations for schematic instances
